A heuristic algorithm for PLA block folding

  • Authors:
  • Y. S. Kuo;C. Chen;T. C. Hu

  • Affiliations:
  • Institute of Information Science, Academia Sinica, Taipei, Taiwan, Republic of China;Institute of Computer Engineering, National Chiao Tung University, Taiwan, R.O.C.;Dept. of EECS, University of California, San Diego, La Jolla, CA

  • Venue:
  • DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
  • Year:
  • 1985

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Abstract

The folding of programmable logic array (PLA) is considered. We develop a heuristic algorithm for optimal block folding. The algorithm is based on the column intersection graph associated with the PLA. Then the techniques of graph partitioning and two-objective linear programming are applied. Test results will be demonstrated to show the effectiveness of the algorithm.