DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Use of change coordination in an information-rich design environment
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Behavioral modeling of transmission gates in VHDL
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A finite machine description of a lexical analysis using table look-up
CSC '89 Proceedings of the 17th conference on ACM Annual Computer Science Conference
Automatic insertion of BIST hardware using VHDL
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A case against event-driven simulation for digital system design
ANSS '91 Proceedings of the 24th annual symposium on Simulation
Tinker: a tool for designing data-centric sensor networks
Proceedings of the 5th international conference on Information processing in sensor networks
autoVHDL: a domain-specific modeling language for the auto-generation of VHDL core wrappers
Proceedings of the compilation of the co-located workshops on DSM'11, TMC'11, AGERE!'11, AOOPES'11, NEAT'11, & VMIL'11
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VHDL language and technology has been under development for the past five years, resulting in a hardware description language that enjoys widespread support within the industry. Version 7.2 of the language was released in August of 1985 and is being considered by the IEEE as a prime candidate for standardization. It is expected that a proposed standard based on Version 7.2 will be available in January of 1987. This standard will be accompanied by a VHDL Tutorial containing extensive examples of the use of the language for hardware design.Activities in the defense and commercial sectors are well underway in order to develop tools targeted to VHDL. These tools include behavioral simulators and synthesis tools, as well as schematic and syntax-directed editors. This paper provides an overview of the VHDL language and technology, reports the status of the various VHDL tools that are under development, and discusses the future of VHDL.