An instruction fetch unit for a graph reduction machine
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
A RISC architecture for symbolic computation
ASPLOS II Proceedings of the second international conference on Architectual support for programming languages and operating systems
Comparing Two Functional Programming Systems
IEEE Transactions on Software Engineering
Lively linear Lisp: “look ma, no garbage!”
ACM SIGPLAN Notices
A RISC processor architecture with a versatile stack system
ACM SIGARCH Computer Architecture News - Special issue on input/output in parallel computer systems
Linear logic and permutation stacks—the Forth shall be first
ACM SIGARCH Computer Architecture News - Special issue: panel sessions of the 1991 workshop on multithreaded computers
NORMA: a graph reduction processor
LFP '86 Proceedings of the 1986 ACM conference on LISP and functional programming
Primitive string transformations as reductions to normal form
ACM SIGPLAN Notices
| Hi-index | 0.00 |