Detection of Ada Static Deadlocks Using Petri Net Invariants
IEEE Transactions on Software Engineering
Integrated concurrency analysis in a software development enviornment
TAV3 Proceedings of the ACM SIGSOFT '89 third symposium on Software testing, analysis, and verification
Analysis of pointers and structures
PLDI '90 Proceedings of the ACM SIGPLAN 1990 conference on Programming language design and implementation
Pointer-induced aliasing: a problem classification
POPL '91 Proceedings of the 18th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Compositional reachability analysis using process algebra
TAV4 Proceedings of the symposium on Testing, analysis, and verification
Automated Analysis of Concurrent Systems with the Constrained Expression Toolset
IEEE Transactions on Software Engineering
The concurrency workbench: a semantics-based tool for the verification of concurrent systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Using state space reduction methods for deadlock analysis in Ada tasking
ISSTA '93 Proceedings of the 1993 ACM SIGSOFT international symposium on Software testing and analysis
Enhancing compositional reachability analysis with context constraints
SIGSOFT '93 Proceedings of the 1st ACM SIGSOFT symposium on Foundations of software engineering
A stubborn attack on state explosion
Formal Methods in System Design - Special issue on computer-aided verification: special methods I
Data flow analysis for verifying properties of concurrent programs
SIGSOFT '94 Proceedings of the 2nd ACM SIGSOFT symposium on Foundations of software engineering
Compositional verification by model checking for counter-examples
ISSTA '96 Proceedings of the 1996 ACM SIGSOFT international symposium on Software testing and analysis
Elements of style: analyzing a software design feature with a counterexample detector
ISSTA '96 Proceedings of the 1996 ACM SIGSOFT international symposium on Software testing and analysis
Timing Analysis of Ada Tasking Programs
IEEE Transactions on Software Engineering - Special issue: best papers of the 1996 international symposium on software testing and analysis ISSTA'96
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Solving shape-analysis problems in languages with destructive updating
ACM Transactions on Programming Languages and Systems (TOPLAS)
Constructing compact models of concurrent Java programs
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
Verifying systems with integer constraints and Boolean predicates: a composite approach
Proceedings of the 1998 ACM SIGSOFT international symposium on Software testing and analysis
Designing executable abstractions
FMSP '98 Proceedings of the second workshop on Formal methods in software practice
Data flow analysis for checking properties of concurrent Java programs
Proceedings of the 21st international conference on Software engineering
Patterns in property specifications for finite-state verification
Proceedings of the 21st international conference on Software engineering
Checking that finite state concurrent programs satisfy their linear specification
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Symbolic Model Checking
Concurrent Programming in Java: Design Principles and Patterns
Concurrent Programming in Java: Design Principles and Patterns
Java Virtual Machine Specification
Java Virtual Machine Specification
The Java Language Specification
The Java Language Specification
Evaluating Deadlock Detection Methods for Concurrent Software
IEEE Transactions on Software Engineering
Protocol Verification as a Hardware Design Aid
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Staging Static Analyses Using Abstraction-Based Program Specialization
PLILP '98/ALP '98 Proceedings of the 10th International Symposium on Principles of Declarative Programming
All from One, One for All: on Model Checking Using Representatives
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Linear Time, Branching Time and Partial Order in Logics and Models for Concurrency, School/Workshop
Using Partial Orders for the Efficient Verification of Deadlock Freedom and Safety Properties
CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
Putting static analysis to work for verification: A case study
Proceedings of the 2000 ACM SIGSOFT international symposium on Software testing and analysis
Finding bugs with a constraint solver
Proceedings of the 2000 ACM SIGSOFT international symposium on Software testing and analysis
Compile-Time Concurrent Marking Write Barrier Removal
Proceedings of the international symposium on Code generation and optimization
Automatic assessment of failure recovery in Erlang applications
Proceedings of the 8th ACM SIGPLAN workshop on ERLANG
Compile-time concurrent marking write barrier removal
Compile-time concurrent marking write barrier removal
Verifying safety properties of concurrent heap-manipulating programs
ACM Transactions on Programming Languages and Systems (TOPLAS)
OSDI'08 Proceedings of the 8th USENIX conference on Operating systems design and implementation
Diagnosing program errors with light-weighted specifications
IEA/AIE'06 Proceedings of the 19th international conference on Advances in Applied Artificial Intelligence: industrial, Engineering and Other Applications of Applied Intelligent Systems
Purity and side effect analysis for java programs
VMCAI'05 Proceedings of the 6th international conference on Verification, Model Checking, and Abstract Interpretation
Reachability analysis of program variables
ACM Transactions on Programming Languages and Systems (TOPLAS)
| Hi-index | 0.00 |
Finite-state verification (e.g., model checking) provides a powerful means to detect concurrency errors, which are often subtle and difficult to reproduce. Nevertheless, widespread use of this technology by developers is unlikely until tools provide automated support for extracting the required finite-state models directly from program source. Unfortunately, the dynamic features of modern languages such as Java complicate the construction of compact finite-state models for verification. In this article, we show how shape analysis, which has traditionally been used for computing alias information in optimizers, can be used to greatly reduce the size of finite-state models of concurrent Java programs by determining which heap-allocated variables are accessible only by a single thread, and which shared variables are protected by locks. We also provide several other state-space reductions based on the semantics of Java monitors. A prototype of the reductions demonstrates their effectiveness.