MPEG-4 Video and Image Coding on Digital Signal Processors

Authors:
Madhukar Budagavi;Jennifer Webb;Minhua Zhou;Jie Liang;Raj Talluri
Affiliations:
DSP Solutions R & D Center, Texas Instruments, Dallas, Texas 75243;DSP Solutions R & D Center, Texas Instruments, Dallas, Texas 75243;DSP Solutions R & D Center, Texas Instruments, Dallas, Texas 75243;DSP Solutions R & D Center, Texas Instruments, Dallas, Texas 75243;DSP Solutions R & D Center, Texas Instruments, Dallas, Texas 75243
Venue:
Journal of VLSI Signal Processing Systems - Special issue on implementation of MPEG-4 multimedia codecs
Year:
1999

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Abstract

The emerging MPEG-4 standard encompasses a wide variety of applications, many of which are suitable for implementation on a Digital Signal Processor (DSP). In particular, consumer products with embedded multimedia capability, such as set-top boxes and wireless communicators, are suitable for DSP-based implementation. With a programmable approach, various algorithmic tradeoffs can be made, based on processing capability. For best performance, careful attention must be paid to memory allocation, data transfer, and ordering of instructions to best match the DSP architecture. We discuss implementing simple profile MPEG-4 video on the low-power TMS320C54x, core profile on the TMS320C6x, and scalable texture profile, which could be implemented on either processor family.