Synthesis of system-level communication by an allocation-based approach
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Communication synthesis for distributed embedded systems
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Proceedings of the 6th international workshop on Hardware/software codesign
Exact and Approximate Algorithms for Scheduling Nonidentical Processors
Journal of the ACM (JACM)
PCI system architecture (4th ed.)
PCI system architecture (4th ed.)
IEEE Transactions on Parallel and Distributed Systems
Hierarchical Scheduling and Allocation of Multirate Systems on Heterogeneous Multiprocessors
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Critical path driven cosynthesis for heterogeneous target architectures
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
HICSS '95 Proceedings of the 28th Hawaii International Conference on System Sciences
Real-analysis, alap-guided synthesis of real-time embedded systems
Real-analysis, alap-guided synthesis of real-time embedded systems
Overhead effects in real-time preemptive schedules
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Minimizing system modification in an incremental design approach
Proceedings of the ninth international symposium on Hardware/software codesign
An approach to incremental design of distributed embedded systems
Proceedings of the 38th annual Design Automation Conference
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System level design paradigms: Platform-based design and communication synthesis
Proceedings of the 41st annual Design Automation Conference
International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
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We describe the first co-design technique aimed at heterogenous systems employing arbitrated communication. Arbitrated system design is especially difficult because communication scheduling is directly tied to task allocation. The method provides a complete co-design—i.e. generation of a hardware configuration along with an allocation and schedule—for the execution of hard real-time data-dependent tasks. By using an actual scheduling analysis in the inner co-design loop, the method is readily able to address realistic system effects including various communication models like arbitration, as in PCI-based systems.