Task Allocation and Precedence Relations for Distributed Real-Time Systems
IEEE Transactions on Computers
Communication synthesis for distributed embedded systems
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
IEEE Transactions on Parallel and Distributed Systems
A task-level hierarchical memory model for system synthesis of multiprocessors
DAC '97 Proceedings of the 34th annual Design Automation Conference
Hardware/software co-synthesis with memory hierarchies
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Co-synthesis of heterogeneous multiprocessor systems using arbitrated communication
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Hardware/software co-synthesis with memory hierarchies
Readings in hardware/software co-design
Coordinated concurrent memory accesses on a reconfigurable multimedia accelerator
Microprocessors & Microsystems
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This paper describes new algorithms for system-level software synthesis, namely the scheduling and allocation of a set of complex tasks running at multiple rates on a heterogeneous multiprocessor. The tasks may have precedence constraints within them. The multiprocessor may be composed of both programmable and fixed-function processing elements and may have arbitrary interconnect topology. Our hierarchical algorithm takes advantage of the hierarchical structure of the system's task graph to hierarchically allocate and schedule processes on the multiprocessor to meet the hard real-time constraints on the tasks. Multimedia is an important application of our algorithm.