ACM Transactions on Programming Languages and Systems (TOPLAS)
Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
A unified framework for conservative and optimistic distributed simulation
PADS '94 Proceedings of the eighth workshop on Parallel and distributed simulation
Parallel logic simulation of VLSI systems
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Symphony: a simulation backplane for parallel mixed-mode co-simulation of VLSI systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Adaptive protocols for parallel discrete event simulation
WSC '96 Proceedings of the 28th conference on Winter simulation
Parallel timing simulation on a distributed memory multiprocessor
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
ACM Transactions on Modeling and Computer Simulation (TOMACS) - Special issue on modeling and analysis of stochastic systems
Asynchronous distributed simulation via a sequence of parallel computations
Communications of the ACM - Special issue on simulation modeling and statistical computing
SIMULATION OF PACKET COMMUNICATION ARCHITECTURE COMPUTER SYSTEMS
SIMULATION OF PACKET COMMUNICATION ARCHITECTURE COMPUTER SYSTEMS
Parallel and distributed VHDL simulation
DATE '00 Proceedings of the conference on Design, automation and test in Europe
µsik " A Micro-Kernel for Parallel/Distributed Simulation Systems
Proceedings of the 19th Workshop on Principles of Advanced and Distributed Simulation
Dynamic resolution in distributed cyber-physical system simulation
Proceedings of the 2013 ACM SIGSIM conference on Principles of advanced discrete simulation
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This paper presents a new protocol for parallel and distributed simulation of VLSI systems. It is novel in two aspects: first, it combines optimistic and conservative synchronization methods, allowing processes to self-adapt for maximal utilization of concurrency. Second, it does not require any application-dependent information like lookahead, which in many cases is unknown, zero, or difficult to automatically obtain from a design in a hardware description language. All these features make it very convenient and practical, extending the class of applications to at least all VHDL circuits, including delta cycle. The proposed protocol has been implemented and used for VHDL simulation. Experimental results on several large VHDL circuits (between 1411 and 14704 processes) have shown promising linear speedups. We also observed that the dynamic synchronization, in which processes automatically adapt to optimistic or conservative behavior, follows closely or finds a very good configuration. This protocol may have a string impact for mixed-signal circuit simulation, where digital parts may be optimistic and heavy-state analog parts, conservative.