Considerations about Nanoelectronic GSI Processors

  • Authors:
  • Jose´ Camargo da Costa;Jaap Hoekstra;Martijn J. Goossens;Chris J. M. Verhoeven;Arthur H. M. van Roermund

  • Affiliations:
  • On leave from Department of Electrical Engineering, Universidade de Brasilia, Brasilia, DF, Brasil camargo@ene.unb.br.;The Electronics Research Lab, Delft University of Technology, NL2628 CD 4 Delft, The Netherlands j.hoekstra@its.tudelft.nl.;The Electronics Research Lab, Delft University of Technology, NL2628 CD 4 Delft, The Netherlands;The Electronics Research Lab, Delft University of Technology, NL2628 CD 4 Delft, The Netherlands;The Electronics Research Lab, Delft University of Technology, NL2628 CD 4 Delft, The Netherlands

  • Venue:
  • Analog Integrated Circuits and Signal Processing - Special issue on analog nano-electronics
  • Year:
  • 2000

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Abstract

According to recent studies, the basic technologies presently adopted by the semiconductor industry for memory and processor fabrication should attain limits imposed by the laws of physics around the year 2010. Nanoscale sized devices like single-electron transistors appear as a highly promising option to replace conventional devices by that time. In this study, considerations about the realization of a GSI processor, based upon nanoelectronic devices, are presented.