Analysis of multiple-bus interconnection networks
Journal of Parallel and Distributed Computing
Computer
Hypercube message routing in the presence of faults
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
Randomized self-routing algorithms for Clos networks
Computers and Electrical Engineering - Special issue: Parallel and distributed computing for intelligent systems
Fault-tolerant computer system design
Fault-tolerant computer system design
Systematic Design of Fault-Tolerant Multiprocessors with Shared Buses
IEEE Transactions on Computers
Graph theory and its applications
Graph theory and its applications
Connective Fault Tolerance in Multiple-Bus Systems
IEEE Transactions on Parallel and Distributed Systems
A fault-tolerant multiple bus interconnection network
A fault-tolerant multiple bus interconnection network
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Optimally fault-tolerant partial-connection multiple-bus networks and their fault-tolerant routing algorithms are presented in this paper. The proposed networks are scalable and provide flexibility in the choice of network parameters determining construction cost, system performance, and fault tolerance, given a fixed number of processors. In this design, when performance begins to fall due to contention, the simple addition of a bus can improve performance without adding costly processors or changing the whole topology, as required for other multiple-bus designs. Also, in situations requiring high reliability, for a fixed number of processors, excellent fault tolerance can be obtained.