Analysis of bus hierarchies for multiprocessors
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
An Orthogonal Multiprocessor for Parallel Scientific Computations
IEEE Transactions on Computers
Scheduling parallel I/O operations
ACM SIGARCH Computer Architecture News - Special issue on input/output in parallel computer systems
A comparative study of single hop WDM interconnections for multiprocessors
ICS '95 Proceedings of the 9th international conference on Supercomputing
Exact Bounds on Running ASCEND/DESCEND and FAN-IN Algorithms on Synchronous Multiple Bus Networks
IEEE Transactions on Parallel and Distributed Systems
Heuristics for Scheduling I/O Operations
IEEE Transactions on Parallel and Distributed Systems
Families of Optimal Fault-Tolerant Multiple-Bus Networks
IEEE Transactions on Parallel and Distributed Systems
Parallel algorithms for the orthogonal multiprocessor
ACM-SE 30 Proceedings of the 30th annual Southeast regional conference
On the Complexity of Optimal Bused Interconnections
IEEE Transactions on Computers
Performance Analysis of a Generalized Class of M-Level Hierarchical Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Symmetric Crossbar Arbiters for VLSI Communication Switches
IEEE Transactions on Parallel and Distributed Systems
Performance of Pruning-Cache Directories for Large-Scale Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Connective Fault Tolerance in Multiple-Bus Systems
IEEE Transactions on Parallel and Distributed Systems
Fault-Tolerant Multiple Bus Networks for Fan-In Algorithms
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
RMB -- A Reconfigurable Multiple Bus Network
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
High-Speed Image reconstruction based on CBP and Fourier Inversion Methods
HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97
Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms
IEEE Transactions on Computers
Switch fabric design for high performance IP routers: a survey
Journal of Systems Architecture: the EUROMICRO Journal
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Hi-index | 4.11 |
First Page of the Article