Communications of the ACM - Special section on computer architecture
Interconnection networks for large-scale parallel processing: theory and case studies
Interconnection networks for large-scale parallel processing: theory and case studies
Structuring parallel algorithms in an MIMD, shared memory environment
Parallel Computing
Designing efficient algorithms for parallel computers
Designing efficient algorithms for parallel computers
Computer
Communication effect basic linear algebra computations on hypercube architectures
Journal of Parallel and Distributed Computing
Hypernet: A communication-efficient architecture for constructing massively parallel computers
IEEE Transactions on Computers
Multipipeline Networking for Compound Vector Processing
IEEE Transactions on Computers
Parallel processing for super-computers and artificial intelligence
Parallel processing for super-computers and artificial intelligence
Graph Problems on a Mesh-Connected Processor Array
Journal of the ACM (JACM)
Sorting on a mesh-connected parallel computer
Communications of the ACM
Computer Architecture and Parallel Processing
Computer Architecture and Parallel Processing
Numerical Methods
Definition and analysis of a class of spanning bus orthogonal multiprocessing systems
CSC '90 Proceedings of the 1990 ACM annual conference on Cooperation
A linear array of processors with partially shared memory for parallel solution of PDE
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
A parallel computer model supporting procedure-based communication
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
Parallel Architectures and Algorithms for Image Component Labeling
IEEE Transactions on Pattern Analysis and Machine Intelligence
OMP: a RISC-based multiprocessor using orthogonal-access memories and multiple spanning buses
ICS '90 Proceedings of the 4th international conference on Supercomputing
Developing a simulator for the USC orthogonal multiprocessor
WSC' 90 Proceedings of the 22nd conference on Winter simulation
Parallel algorithms for the orthogonal multiprocessor
ACM-SE 30 Proceedings of the 30th annual Southeast regional conference
IEEE Transactions on Computers
Orthogonal Graphs for the Construction of a Class of Interconnection Networks
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Synchronous Non-local Image Processing on Orthogonal Multiprocessor Systems
VECPAR '00 Selected Papers and Invited Talks from the 4th International Conference on Vector and Parallel Processing
Embedded real-time architecture for level-set-based active contours
EURASIP Journal on Applied Signal Processing
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An architecture called an orthogonal multiprocessor (OMP) is proposed. This OMP architecture has a simplified busing structure and partially shared memory and compares very favorably with fully shared-memory multiprocessors using crossbar switches, multiple buses, or multistage networks. The higher performance comes mainly from significantly increased memory bandwidth, fully exploited parallelism, reduced communication overhead, and lower hardware control complexities. Parallel algorithms being mapped include matrix arithmetic, linear system solver, FFT, array sorting, linear programming, and parallel PDE solutions. In most cases, linear speedup can be achieved on the OMP system. The OMP architecture provides linearly scalable performance and is well suited for building special-purpose scientific computers.