Performance and evaluation of LISP systems
Performance and evaluation of LISP systems
Fat-trees: universal networks for hardware-efficient supercomputing
IEEE Transactions on Computers
The connection machine
Communications of the ACM - Special issue on parallelism
Communications of the ACM - Special issue on parallelism
Multigrid Algorithms on the Hypercube Multiprocessor
IEEE Transactions on Computers
The architecture of a homogeneous vector supercomputer
Journal of Parallel and Distributed Computing
Multi-computer architectures for artificial intelligence: toward fast, robust, parallel systems
Multi-computer architectures for artificial intelligence: toward fast, robust, parallel systems
Strategies for interconnection networks: some methods from graph theory
Journal of Parallel and Distributed Computing
On mapping parallel algorithms into parallel architectures
Journal of Parallel and Distributed Computing
Parallel processing for super-computers and artificial intelligence
Parallel processing for super-computers and artificial intelligence
The cube-connected cycles: a versatile network for parallel computation
Communications of the ACM
X-Tree: A tree structured multi-processor computer architecture
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Cost-Performance Bounds for Multimicrocomputer Networks
IEEE Transactions on Computers
The Binary Tree as an Interconnection Network: Applications to Multiprocessor Systems and VLSI
IEEE Transactions on Computers
A Cluster Structure as an Interconnection Network for Large Multimicrocomputer Systems
IEEE Transactions on Computers
Fault Diagnosis in a Boolean n Cube Array of Microprocessors
IEEE Transactions on Computers
On the Impact of Communication Complexity on the Design of Parallel Numerical Algorithms
IEEE Transactions on Computers
Hypertree: A Multiprocessor Interconnection Topology
IEEE Transactions on Computers
Computer
Critical issues in mapping neural networks on message-passing multicomputers
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
An Orthogonal Multiprocessor for Parallel Scientific Computations
IEEE Transactions on Computers
The HCN: a versatile interconnection network based on cubes
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
Addressing, Routing, and Broadcasting in Hexagonal Mesh Multiprocessors
IEEE Transactions on Computers
The KYKLOS Multicomputer Network: Interconnection Strategies, Properties, and Applications
IEEE Transactions on Computers
The Twisted N-Cube with Application to Multiprocessing
IEEE Transactions on Computers
Comparison of hypercube, hypernet, and symmetric hypernet architectures
ACM SIGARCH Computer Architecture News
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Efficient embeddings into the hypercube using matrix transformations
ICS '95 Proceedings of the 9th international conference on Supercomputing
The Extended Cube Connected Cycles: An Efficient Interconnection for Massively Parallel Systems
IEEE Transactions on Computers
Embedding Hierarchical Hypercube Networks into the Hypercube
IEEE Transactions on Parallel and Distributed Systems
Comments on "Hierarchical Cubic Networks"
IEEE Transactions on Parallel and Distributed Systems
Macro-Star Networks: Efficient Low-Degree Alternatives to Star Graphs
IEEE Transactions on Parallel and Distributed Systems
Combinatorial Properties of Two-Level Hypernet Networks
IEEE Transactions on Parallel and Distributed Systems
Optical hierarchical fully shuffled tree
SAC '00 Proceedings of the 2000 ACM symposium on Applied computing - Volume 2
Recursive Diagonal Torus: An Interconnection Network for Massively Parallel Computers
IEEE Transactions on Parallel and Distributed Systems
Folded-crossed hypercube: a complete interconnection network
Journal of Systems Architecture: the EUROMICRO Journal
Performance Analysis of Multilevel Bus Networks for Hierarchical Multiprocessors
IEEE Transactions on Computers
Automatic Reconfiguration and Yield of the TESH Multicomputer Network
IEEE Transactions on Computers
Design, Analysis, and Simulation of I/O Architectures for Hypercube Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Extended Hypercube: A Hierarchical Interconnection Network of Hypercubes
IEEE Transactions on Parallel and Distributed Systems
The Hierarchical Hypercube: A New Interconnection Topology for Massively Parallel Systems
IEEE Transactions on Parallel and Distributed Systems
Algorithms and Properties of a New Two-Level Network with Folded Hypercubes as Basic Modules
IEEE Transactions on Parallel and Distributed Systems
Cyclic Networks: A Family of Versatile Fixed-Degree Interconnection Architectures
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
Node-to-Set Disjoint Paths Problem in Rotator Graphs
ASIAN '00 Proceedings of the 6th Asian Computing Science Conference on Advances in Computing Science
PAS '97 Proceedings of the 2nd AIZU International Symposium on Parallel Algorithms / Architecture Synthesis
The RTCC-pyramid: A Versatile Pyramid network
HPCASIA '05 Proceedings of the Eighth International Conference on High-Performance Computing in Asia-Pacific Region
Swapped interconnection networks: Topological, performance, and robustness attributes
Journal of Parallel and Distributed Computing - Special issue: Design and performance of networks for super-, cluster-, and grid-computing: Part II
An oblivious shortest-path routing algorithm for fully connected cubic networks
Journal of Parallel and Distributed Computing
The triangular pyramid: Routing and topological properties
Information Sciences: an International Journal
Node-disjoint paths in hierarchical hypercube networks
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
HPGRID: a novel architectural model for resource management systems
Proceedings of the 2011 International Conference on Communication, Computing & Security
International Journal of Computer Applications in Technology
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A new class of modular networks is proposed for hierarchically constructing massively parallel computer systems for distributed supercomputing and AI applications. These networks are called hypernets. They are constructed incrementally with identical cubelets, treelets, or buslets that are well suited for VLSI implementation. Hypernets integrate positive features of both hypercubes and tree-based topologies, and maintain a constant node degree when the network size increases. This paper presents the principles of constructing hypernets and analyzes their architectural potentials in terms of message routing complexity, cost-effective support for global as well as localized communication, I/O capabilities, and fault tolerance. Several algorithms are mapped onto hypernets to illustrate their ability to support parallel processing in a hierarchically structured or data-dependent environment. The emulation of hypercube connections using less hardware is shown. The potential of hypernets for efficient support of connectionist models of computation is also explored.