Computer
Analysis of a class of cluster-based multiprocessor systems
Information Sciences: an International Journal
Analysis of bus hierarchies for multiprocessors
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Multiprocessor Organization—a Survey
ACM Computing Surveys (CSUR)
Computer Structures: Principles and Examples
Computer Structures: Principles and Examples
Efficient hierarchical interconnection for multiprocessor systems
Proceedings of the 1992 ACM/IEEE conference on Supercomputing
Performance prediction based loop scheduling for heterogeneous computing environment
SAC '97 Proceedings of the 1997 ACM symposium on Applied computing
Performance Analysis of Multilevel Bus Networks for Hierarchical Multiprocessors
IEEE Transactions on Computers
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
CPMBK: An improved cluster-based interconnection network
International Journal of Computer Applications in Technology
| Hi-index | 0.00 |
The performance of the m-level hierarchical multiprocessor system is analyzed in terms of the system bandwidth for both hierarchically nonuniform reference and uniform reference models. The results show that for a higher rate of local requests (requests to memory modules within the same cluster) the m-level system performs fairly close to the crossbar system and outperforms a typical multiple-bus system (with the number of buses equal to half the number of processors). The bandwidth of the m-level system is evaluated for different numbers of levels, and the results are compared with those of a crossbar system (m=1).