Speech recognition chip for monosyllables

  • Authors:
  • Kazuhiro Nakamura;Qiang Zhu;Shinji Maruoke;Takashi Horiyama;Shinji Kimura;Katsumasa Watanabe

  • Affiliations:
  • Fujistu Laboratories Ltd. and Graduate School of Information Science, Nara Institute of Science and Technology, 8916-5 Takayama, Ikoma, Nara, 630-0101 Japan;Fujistu Laboratories Ltd. and Graduate School of Information Science, Nara Institute of Science and Technology, 8916-5 Takayama, Ikoma, Nara, 630-0101 Japan;Hitachi Ltd. and Graduate School of Information Science, Nara Institute of Science and Technology, 8916-5 Takayama, Ikoma, Nara, 630-0101 Japan;Fujistu Laboratories Ltd. and Graduate School of Information Science, Nara Institute of Science and Technology, 8916-5 Takayama, Ikoma, Nara, 630-0101 Japan;Fujistu Laboratories Ltd. and Graduate School of Information Science, Nara Institute of Science and Technology, 8916-5 Takayama, Ikoma, Nara, 630-0101 Japan;Fujistu Laboratories Ltd. and Graduate School of Information Science, Nara Institute of Science and Technology, 8916-5 Takayama, Ikoma, Nara, 630-0101 Japan

  • Venue:
  • Proceedings of the 2001 Asia and South Pacific Design Automation Conference
  • Year:
  • 2001

Quantified Score

Hi-index 0.00

Visualization

Abstract

In the paper, we present a real-time speech recognition chip for monosyllables such as A, B, ..., etc. The chip recognizes up to 64 monosyllables based on the Hidden Markov Model (HMM), which is a well known speaker-independent recognition method. The chip accepts a short-speech frame including 256 16-bit digitized samples corresponding to 11.6 msec period, and outputs the 6-bit symbol code of monosyllables for 16 short-frames (corresponding to 185.6 msec). A learning circuit to update HMM parameters for the recognition chip has also been designed, and the recognition chip includes an interface to the learning circuit. We have fabricated the recognition chip by VDEC Rohm 0.6 um process on a 4.5 mm x 4.5 mm chip. We have also made a layout of the entire circuit including the learning circuit by VDEC Rohm 0.35 um process on a 4.9 mm x 4.9 mm chip.