Design and validation of computer protocols
Design and validation of computer protocols
The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Model checking
Simple on-the-fly automatic verification of linear temporal logic
Proceedings of the Fifteenth IFIP WG6.1 International Symposium on Protocol Specification, Testing and Verification XV
Characterizing Correctness Properties of Parallel Programs Using Fixpoints
Proceedings of the 7th Colloquium on Automata, Languages and Programming
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Efficient On-the-Fly Model Checking for CTL
LICS '95 Proceedings of the 10th Annual IEEE Symposium on Logic in Computer Science
From Falsification to Verification
FST TCS '01 Proceedings of the 21st Conference on Foundations of Software Technology and Theoretical Computer Science
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Temporal-Safety Proofs for Systems Code
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
From complementation to certification
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2004)
Groebner bases computation in Boolean rings for symbolic model checking
MOAS'07 Proceedings of the 18th conference on Proceedings of the 18th IASTED International Conference: modelling and simulation
A type system equivalent to a model checker
ACM Transactions on Programming Languages and Systems (TOPLAS)
Convincing Proofs for Program Certification
Electronic Notes in Theoretical Computer Science (ENTCS)
Groebner bases computation in Boolean rings for symbolic model checking
MS '07 The 18th IASTED International Conference on Modelling and Simulation
On the automated synthesis of proof-carrying temporal reference monitors
LOPSTR'06 Proceedings of the 16th international conference on Logic-based program synthesis and transformation
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
A type system equivalent to a model checker
ESOP'05 Proceedings of the 14th European conference on Programming Languages and Systems
Proving the refuted: symbolic model checkers as proof generators
Concurrency, Compositionality, and Correctness
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Model checking is used to automatically verify temporal properties of finite state systems. It is usually considered to be `sucessful', when an error, in the form of a counterexample to the checked property, is found. We present the dual approach, where, in the presence of no counterexample, we automatically generate a proof that the checked property is satisfied by the given system. Such a proof can be used to obtain intuition about the verified system. This approach can be added as a simple extension to existing model checking tools.