Double-gate fully-depleted SOI transistors for low-power high-performance nano-scale circuit design

• Authors:

• Rongtian Zhang;Kaushik Roy;David Janes

• Affiliations:

• ECE, Purdue University, West Lafayette, IN;ECE, Purdue University, West Lafayette, IN;ECE, Purdue University, West Lafayette, IN

• Venue:
• ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
• Year:
• 2001