Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories
SIGGRAPH '89 Proceedings of the 16th annual conference on Computer graphics and interactive techniques
A scalable hardware render accelerator using a modified scanline algorithm
SIGGRAPH '92 Proceedings of the 19th annual conference on Computer graphics and interactive techniques
Hardware accelerated rendering of CSG and transparency
SIGGRAPH '94 Proceedings of the 21st annual conference on Computer graphics and interactive techniques
Talisman: commodity realtime 3D graphics for the PC
SIGGRAPH '96 Proceedings of the 23rd annual conference on Computer graphics and interactive techniques
Architectural implications of hardware-accelerated bucket rendering on the PC
HWWS '97 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
HWWS '97 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
Simple models of the impact of overlap in bucket rendering
HWWS '98 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
Talisman: Multimedia for the PC
IEEE Micro
Larrabee: a many-core x86 architecture for visual computing
ACM SIGGRAPH 2008 papers
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This paper presents ZR (Zone Rendering), a 3D graphics technology that addresses ever-increasing bandwidth requirements using chunk rendering technique, and at the same time solves 3D API compatibility issues commonly associated with chunk rendering graphics devices. We apply a pipeline serialization technique to handle the cases causing compatibility issues. However, excessive frequency of serializations may offset the performance advantage of ZR. In order to manage potential performance problems we developed software and hardware techniques to optimize ZR performance for most events that might cause the serialization. Comprehensive validation experiments were conducted for popular 3D applications to show that after the optimizations the residual impact of the serialization is very small. Finally, using the results of Intel® 830 graphics, which implements ZR, we demonstrate that ZR provides significant 3D graphics performance improvement. This result is achieved within a limited bandwidth budget, and at the cost of modest micro-architectural changes to traditional graphics pipeline.