Hierarchical correctness proofs for distributed algorithms
PODC '87 Proceedings of the sixth annual ACM Symposium on Principles of distributed computing
MFPS '92 Selected papers of the meeting on Mathematical foundations of programming semantics
Formal Verification for Fault-Tolerant Architectures: Prolegomena to the Design of PVS
IEEE Transactions on Software Engineering
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
Forward and backward simulations I.: untimed systems
Information and Computation
Forward and backward simulations II.: timing-based systems
Information and Computation
Modeling and verification of randomized distributed real-time systems
Modeling and verification of randomized distributed real-time systems
Timewise refinement for communicating processes
Science of Computer Programming
Verification of a Leader Election Protocol: Formal Methods Applied to IEEE 1394
Formal Methods in System Design
Distributed Algorithms
Probabilistic simulations for probabilistic processes
Nordic Journal of Computing
Hybrid Systems
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Liveness in Timed and Untimed Systems
ICALP '94 Proceedings of the 21st International Colloquium on Automata, Languages and Programming
Mechanical verification of timed automata: a case study
RTAS '96 Proceedings of the 2nd IEEE Real-Time Technology and Applications Symposium (RTAS '96)
Description and formal specification of the Link Layer of P1394
Description and formal specification of the Link Layer of P1394
Focus Points and Convergent Process Operators
Focus Points and Convergent Process Operators
Formal Verification of the IEEE 802.1D Spanning Tree Protocol Using Extended Rebeca
Electronic Notes in Theoretical Computer Science (ENTCS)
Leader election in anonymous radio networks: model checking energy consumption
ASMTA'10 Proceedings of the 17th international conference on Analytical and stochastic modeling techniques and applications
Semi-formal development of a fault-tolerant leader election protocol in erlang
FATES'04 Proceedings of the 4th international conference on Formal Approaches to Software Testing
Time constraint patterns for event b development
B'07 Proceedings of the 7th international conference on Formal Specification and Development in B
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The IEEE 1394 architecture standard defines a high performance serial multimedia bus that allows several components in a network to communicate with each other at high speed. In the physical layer of the architecture, a leader election protocol is used to find a spanning tree with a unique root in the network topology. If there is a cycle in the network, the protocol treats this as an error situation. This paper presents a formal model of the leader election protocol in the language IOA and a correctness proof. Hereby, it is shown that under certain timing restrictions the protocol behaves correctly. The timing parameters in the IEEE 1394 standard documentation obey the restrictions found in this proof.