Verification of a Leader Election Protocol: Formal Methods Applied to IEEE 1394
Formal Methods in System Design
A Timed Verification of the IEEE 1394 Leader Election Protocol
Formal Methods in System Design
Interactive Visualization of State Transition Systems
IEEE Transactions on Visualization and Computer Graphics
Computer assisted manipulation of algebraic process specifications
ACM SIGPLAN Notices
State Space Reduction Using Partial tau-Confluence
MFCS '00 Proceedings of the 25th International Symposium on Mathematical Foundations of Computer Science
ARTS '99 Proceedings of the 5th International AMAST Workshop on Formal Methods for Real-Time and Probabilistic Systems
Parametric real-time model checking using splitting trees
Nordic Journal of Computing
Symbolic Reachability for Process Algebras with Recursive Data Types
Proceedings of the 5th international colloquium on Theoretical Aspects of Computing
Towards informed swarm verification
NFM'11 Proceedings of the Third international conference on NASA Formal methods
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We give a formal specification in $\mu$CRL of the Link Layer as described in the IEEE document ``P1394 Standard for a High Performance Serial Bus''''; this specification may serve as a starting point for further verification.