Verification of a Leader Election Protocol: Formal Methods Applied to IEEE 1394

  • Authors:

  • Marco Devillers;David Griffioen;Judi Romijn;Frits Vaandrager

  • Affiliations:

  • Computing Science Institute, University of Nijmegen, P.O. Box 9010, 6500 GL Nijmegen, The Netherlands. marcod@cs.kun.nl;Computing Science Institute, University of Nijmegen, P.O. Box 9010, 6500 GL Nijmegen, The Netherlands&semi/ CWI, P.O. Box 94079, 1090 GB Amsterdam, The Netherlands. davidg@cs.kun.nl;Computing Science Institute, University of Nijmegen, P.O. Box 9010, 6500 GL Nijmegen, The Netherlands&semi/ CWI, P.O. Box 94079, 1090 GB Amsterdam, The Netherlands. judi@cs.kun.nl;Computing Science Institute, University of Nijmegen, P.O. Box 9010, 6500 GL Nijmegen, The Netherlands. fvaan@cs.kun.nl

  • Venue:
  • Formal Methods in System Design
  • Year:
  • 2000

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Abstract

The IEEE 1394 high performance serial multimedia bus protocol allows several components to communicate with each other at high speed. In this paper we present a formal model and verification of a leader election algorithm that forms the core of the tree identify phase of the physical layer of the 1394 protocol.We describe the algorithm formally in the I/O automata model of Lynch and Tuttle, and verify that for an arbitrary tree topology exactly one leader is elected. A large part of our verification has been checked mechanically with PVS, a verification system for higher-order logic.