Design and Analysis of Instruction Set Processors

Using bottom-up design techniques in the synthesis of digital hardware from abstract behavioral descriptions

25 years of DAC Papers on Twenty-five years of electronic design automation

Superpipelined control and data path synthesis

DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference

Automatic code generation for microprocessor based systems

Proceedings of the 1985 ACM SIGSMALL symposium on Small systems

Using bottom-up design techniques in the synthesis of digital hardware from abstract behavioral descriptions

DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference

Three Decades of HDLs: Part I, CDL Through TI-HDL

IEEE Design & Test

Vertical Migration of Software Functions and Algorithms Using Enhanced Microsequencing

IEEE Transactions on Computers

Using Feedback to Improve VLSI Designs

IEEE Expert: Intelligent Systems and Their Applications

A transformational approach to binary translation of delayed branches

ACM Transactions on Programming Languages and Systems (TOPLAS)

A “metasimulator” for microcoded processors

MICRO 17 Proceedings of the 17th annual workshop on Microprogramming

Pragmatic aspects of reusable program generators

Journal of Functional Programming

Automating human-performance modeling at the millisecond level

Human-Computer Interaction

A transformational approach to binary translation of delayed branches with applications to SPARC® and PA-RISC instructions sets

A transformational approach to binary translation of delayed branches with applications to SPARC® and PA-RISC instructions sets