Reduced instruction set computers
Communications of the ACM - Special section on computer architecture
Systematic protection mechanism design
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
Empirical analysis of the mesa instruction set
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
An analysis of a mesa instruction set using dynamic instruction frequencies
ASPLOS I Proceedings of the first international symposium on Architectural support for programming languages and operating systems
The RISC processor DMN-6: a unified data-control flow architecture
ACM SIGARCH Computer Architecture News
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The minimal CISC architecture presented here is an extremely simple zero-address architecture suitable for microprogrammed implementation. It is sufficiently simple to be introduced in one lecture, with time left over for discussion of implementation or enhancement options.