Communicating sequential processes
Communicating sequential processes
A formal protocol conversion method
SIGCOMM '86 Proceedings of the ACM SIGCOMM conference on Communications architectures & protocols
Supervisory control of a class of discrete event processes
SIAM Journal on Control and Optimization
On the supermal controllable sublanguage of a given language
SIAM Journal on Control and Optimization
On observability of discrete-event systems
Information Sciences: an International Journal - Robotics and Automation/Control Series
Formulas for calculating supremal controllable and normal sublanguages
Systems & Control Letters
On controllability and normality of discrete event dynamical systems
Systems & Control Letters
Computer Networks
IEEE Transactions on Software Engineering
Supervisory control of communicating processes
Proceedings of the IFIP WG6.1 Tenth International Symposium on Protocol Specification, Testing and Verification X
Introduction to Automata Theory, Languages, and Computation (3rd Edition)
Introduction to Automata Theory, Languages, and Computation (3rd Edition)
Solution of parallel language equations for logic synthesis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A protocol converter for nonblocking protocols
Integration, the VLSI Journal
Progressive solutions to a parallel automata equation
Theoretical Computer Science
Compositionally Progressive Solutions of Synchronous FSM Equations
Discrete Event Dynamic Systems
Residual for Component Specifications
Electronic Notes in Theoretical Computer Science (ENTCS)
Multi-clock SoC design using protocol conversion
Proceedings of the Conference on Design, Automation and Test in Europe
A theory of mediators for eternal connectors
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part II
Synthesis of interface automata
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
Generalizing the submodule construction techniques for extended state machine models
FORTE'06 Proceedings of the 26th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Submodule construction for extended state machine models
FORTE'05 Proceedings of the 25th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Bridging the interoperability gap: overcoming combined application and middleware heterogeneity
Middleware'11 Proceedings of the 12th ACM/IFIP/USENIX international conference on Middleware
Automatica (Journal of IFAC)
Bridging the interoperability gap: overcoming combined application and middleware heterogeneity
Proceedings of the 12th International Middleware Conference
Using logic to solve the submodule construction problem
Discrete Event Dynamic Systems
Correct-by-construction multi-component SoC design
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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A protocol mismatch occurs when heterogeneous networkstry to communicate with each other. Such mismatches are inevitabledue to the proliferation of a multitude of networking architectures,hardware, and software on one hand, and the need for global connectivityon the other hand. In order to circumvent this problem the solutionof protocol conversion has been proposed. In this paper we presenta systematic approach to protocol conversion using the theoryof supervisory control of discrete event systems, which was partiallyfirst addressed by Inan. We study the problem of designing aconverter for a given mismatched pair of protocols, using theirspecifications, and the specifications for the channel and theuser services. We introduce the notion of converter languagesand use it to obtain a necessary and sufficient condition forthe existence of protocol converter and present an effectivealgorithm for computing it whenever it exists.