A methodology for correct-by-construction latency insensitive design
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A Discrete Event Systems Approach for Protocol Conversion
Discrete Event Dynamic Systems
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Convertibility verification and converter synthesis: two faces of the same coin
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Efficient On-the-Fly Model Checking for CTL
LICS '95 Proceedings of the 10th Annual IEEE Symposium on Logic in Computer Science
Bridge Over Troubled Wrappers: Automated Interface Synthesis
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
A Module Checking Based Converter Synthesis Approach for SoCs
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
A formal approach to the protocol converter problem
Proceedings of the conference on Design, automation and test in Europe
Adaptor synthesis for real-time components
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Argos: an automaton-based synchronous language
Computer Languages
Tight WCRT analysis of synchronous C programs
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Correct-by-construction multi-component SoC design
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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The automated design of SoCs from pre-selected IPs that may require different clocks is challenging because of the following issues. Firstly, protocol mismatches between IPs need to be resolved automatically before IPs are integrated. Secondly, the presence of multiple clocks makes the protocol conversion even more difficult. Thirdly, it is desirable that the resulting integration is correct-by-construction, i.e., the resulting SoC satisfies given system-level specifications. All of these issues have been studied extensively, although not in a unifying manner. In this paper we propose a framework based on protocol conversion that addresses all these issues. We have extensively studied many SoC design problems and show that the proposed methodology is capable of handling them better than other known approaches. A significant contribution of the proposed approach is that it nicely generalizes many existing techniques for formal SoC design and integrates them into a single approach.