A bridging model for parallel computation
Communications of the ACM
A methodology for performance analysis of parallel computations with looping constructs
Journal of Parallel and Distributed Computing
LogP: towards a realistic model of parallel computation
PPOPP '93 Proceedings of the fourth ACM SIGPLAN symposium on Principles and practice of parallel programming
Performance prediction of parallel processing systems: the PAMELA methodology
ICS '93 Proceedings of the 7th international conference on Supercomputing
Analytical performance prediction on multicomputers
Proceedings of the 1993 ACM/IEEE conference on Supercomputing
SIGMETRICS '94 Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Performance prediction of parallel systems with scalable specifications—methodology and case study
SIGMETRICS '94 Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Software architecture: perspectives on an emerging discipline
Software architecture: perspectives on an emerging discipline
Evaluation of design alternatives for a multiprocessor microprocessor
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Optimal register assignment to loops for embedded code generation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Can shared-memory model serve as a bridging model for parallel computation?
Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures
Models and languages for parallel computation
ACM Computing Surveys (CSUR)
Performance evaluation of software architectures
Proceedings of the 1st international workshop on Software and performance
The Unified Modeling Language user guide
The Unified Modeling Language user guide
Experience with performing architecture tradeoff analysis
Proceedings of the 21st international conference on Software engineering
Modeling Web application architectures with UML
Communications of the ACM
A Classification and Comparison Framework for Software Architecture Description Languages
IEEE Transactions on Software Engineering
Let's evaluate performance algebraically
ACM Computing Surveys (CSUR)
A UML tool for an automatic generation of simulation programs
Proceedings of the 2nd international workshop on Software and performance
Designing Concurrent, Distributed, and Real-Time Applications with Uml
Designing Concurrent, Distributed, and Real-Time Applications with Uml
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
Performance Metrics: Keeping the Focus on Runtime
IEEE Parallel & Distributed Technology: Systems & Technology
Trapper: Eliminating Performance Bottlenecks in a Parallel Embedded Application
IEEE Parallel & Distributed Technology: Systems & Technology
Trace Factory: Generating Workloads for Trace-Driven Simulation of Shared-Bus Multiprocessors
IEEE Parallel & Distributed Technology: Systems & Technology
What's Ahead for Embedded Software?
Computer
The ChARM Tool for Tuning Embedded Systems
IEEE Micro
Scenario-Based Analysis of Software Architecture
IEEE Software
A Trace-Driven Simulator for Performance Evaluation of Cache-Based Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
A Method for Design and Performance Modeling of Client/Server Systems
IEEE Transactions on Software Engineering
Assessing Architectural Complexity
CSMR '98 Proceedings of the 2nd Euromicro Conference on Software Maintenance and Reengineering ( CSMR'98)
A Performance Prototyping Approach to Designing Concurrent Software Architectures
PDSE '97 Proceedings of the 2nd International Workshop on Software Engineering for Parallel and Distributed Systems
Simulation-Trace-Based Component Performance Prediction
SS '00 Proceedings of the 33rd Annual Simulation Symposium
Reengineering Real-Time Embedded Software Onto a Parallel Processing Platform
WCRE '96 Proceedings of the 3rd Working Conference on Reverse Engineering (WCRE '96)
Fine-grain design space exploration for a cartographic SoC multiprocessor
ACM SIGARCH Computer Architecture News
Hi-index | 0.00 |
Many software applications demanding a considerable computing power are moving towards the field of embedded systems (and, in particular, hand-held devices). A possible way to increase the computing power of this kind of platform, so that both cost and power consumption are kept low, is the employment of multiple CPU cores on the same chipset. Consequently, it is essential to design applications that meet performance requirements leveraging the underlying parallel platform. As embedded applications are usually built using different components (whose source code is often not available) from different companies, the designer can mostly only operate at the architectural level. So far, methodologies for designing software architectures have mainly addressed general-purpose systems, often relying on hardware platforms with a high degree of parallelism. In this paper, we present our experience in architectural design of parallel embedded applications; as a result, we propose a possible methodology for the application design at the architectural level, targeted to embedded systems built upon multicore chipsets with a low degree of parallelism. It makes use of performance predictions, obtained by simulations. Such a methodology can be employed both for retargeting existing sequential applications to parallel processing platforms and for designing complete applications from scratch. We show the application of the proposed methodology to an embedded digital cartographic system. Starting with a software description using UML diagrams, candidate software architectures (utilizing different parallel solutions) are first defined and then evaluated, to end with the selection of the one yielding the highest performance gain.