On the accuracy of memory reference models
Proceedings of the 7th international conference on Computer performance evaluation : modelling techniques and tools: modelling techniques and tools
ACM Computing Surveys (CSUR)
Specification and Design of Embedded Hardware-Software Systems
IEEE Design & Test
A Trace-Driven Simulator for Performance Evaluation of Cache-Based Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Guest Editors' Introduction-Cache Memory and Related Problems: Enhancing and Exploiting the Locality
IEEE Transactions on Computers - Special issue on cache memory and related problems
Performance-steered design of software architectures for embedded multicore systems
Software—Practice & Experience
Fine-grain design space exploration for a cartographic SoC multiprocessor
ACM SIGARCH Computer Architecture News
A proposal for input-sensitivity analysis of profile-driven optimizations on embedded applications
MEDEA '03 Proceedings of the 2003 workshop on MEmory performance: DEaling with Applications , systems and architecture
Optimizing instruction cache performance of embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
An educational environment for designing and performance tuning of embedded systems
WCAE '98 Proceedings of the 1998 workshop on Computer architecture education
An ESL approach for energy consumption analysis of cache memories in SoC platforms
International Journal of Reconfigurable Computing - Special issue on selected papers from the southern programmable logic conference (SPL2010)
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In embedded system design, the designer has to find a tradeoff solution for system architecture to satisfy conflicting requirements of the product. Tuning such a system and, in particular, its cache memory, is a complex and difficult task. For these reasons, the designers need simulators to investigate how to improve performance, reduce power consumption and so on. These tools, in the past used only by companies involved in microprocessor design, are now very useful in the design of embedded products. We show the usefulness of our tool in configuring the memory subsystem for two typical programs for embedded systems.