Introduction to algorithms
VLSI Implementation of the Multistage Detector for Next Generation Wideband CDMA Receivers
Journal of VLSI Signal Processing Systems
Challenges and opportunities in broadband and wireless communication designs
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Multitier Wireless Communications
Wireless Personal Communications: An International Journal
Efficient VLSI Architectures for Baseband Signal Processing in Wireless Base-Station Receivers
ASAP '00 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
On-line Arithmetic for Detection in Digital Communication Receivers
ARITH '01 Proceedings of the 15th IEEE Symposium on Computer Arithmetic
Low-power bit-serial Viterbi decoder for next generation wide-band CDMA systems
ICASSP '99 Proceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 04
Radio access selection for multistandard terminals
IEEE Communications Magazine
Functionally partitioned module-based programmable architecture for wireless base-band processing
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems
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Next-generation wireless computing platforms will contain flexiblecommunications capabilites. At Rice University,the Rice Everywhere NEtwork (RENÉ) project is investigating a multi-standard, multi-tierintegration of W-CDMA cellular systems, high speed wireless LANs, and home wireless networks.There are many challenges in mapping these advanced communicationalgorithms to real-time hardware computing platforms.In this paper, we present current work on the developmentof a reconfigurable baseband physical layer containing DSP processorsand FPGA accelerators. Our goal is the design of amulti-tier network interface card (mNIC) which is capableof exploiting efficient, low-power reconfiguration.