Design and analysis of static memory management policies for CC-NUMA Multiprocessors

  • Authors:

  • Ravishankar Iyer;Hujun Wang;Laxmi Narayan Bhuyan

  • Affiliations:

  • Intel Corporation, 15220 N.W. Greenbrier Parkway, Beaverton, OR;Intel Corporation, 15220 N.W. Greenbrier Parkway, Beaverton, OR and Department of Computer Science, Texas A&M University, College Station, TX;Intel Corporation, 15220 N.W. Greenbrier Parkway, Beaverton, OR and Department of Computer Science, University of California, Riverside, CA

  • Venue:
  • Journal of Systems Architecture: the EUROMICRO Journal
  • Year:
  • 2002

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Abstract

In this paper, we characterize the performance of three existing memory management techniques, namely, buddy, round-robin, and first-touch policies. With existing memory management schemes, we find several cases where requests from different processors arrive at the same memory simultaneously. To alleviate this problem, we present two improved memory management policies called skew-mapping and prime-mapping policies. By utilizing the properties of skewing and prime, the improved memory management designs considerably improve the application performance of cache coherent non-uniform memory access multiprocessors. We also re-evaluate the performance of a multistage interconnection network using these existing and improved memory management policies. Our results effectively present the performance benefits of different memory management techniques based on the sharing patterns of applications. Applications with a low degree of sharing benefit from the data locality provided by first-touch. However, several applications with significant sharing degrees as well as those with single processor initialization routines benefit highly from the intelligent distribution of data provided by skew-mapping and prime-mapping schemes. Improvements due to the new schemes are found to be as high as 35% in stall time.