Journal of Information Processing and Cybernetics
Transient simulation of lossy interconnect
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
IBM System/390 air-cooled alumina thermal conduction module
IBM Journal of Research and Development
Detailed layer assignment for MCM routing
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
A construction of minimal delay Steiner tree using two-pole delay model
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
MCG: a correct-by-design multichip module router with crosstalk avoidance
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
Layer assignment for reliable system-on-package
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
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The authors describe the multilayer MCM (multichip module) routing problem, and propose an approach for routing high-performance MCMs with the objective of minimizing interconnect delays and crosstalk. They first introduce an approach for rapidly estimating the time-domain response of lossy transmission line trees, and propose a realistic second-order delay model for MCM interconnects. The delay model is used to guide a performance-driven global routing algorithm. Given the 2-D global paths, the next stage is layer assignment. An effective algorithm for constrained layer assignment is developed. Based on the best-known maxcut approximation algorithm (which performs well in practice), a maximal k-color ordering is formulated for minimizing both interlayer and intralayer crosstalk as well as crossings in 3-D MCM substrates. The authors also propose a strategy that exhibits a good tradeoff between circuit performance and design cost, instead of concentrating exclusively on a single objective such as area minimization.