Monte Carlo methods. Vol. 1: basics
Monte Carlo methods. Vol. 1: basics
Test Economics in the 21st Century
IEEE Design & Test
Economics Modelling and Optimisation of MCM Test Strategies
EDTC '96 Proceedings of the 1996 European conference on Design and Test
5.2 Self-Timed Boundary-Scan Cells for Multi-Chip Module Test
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Potentials of chip-package co-design for high-speed digital applications
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Assessing the cost effectiveness of integrated passives
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A New Test/Diagnosis/Rework Model for Use in Technical Cost Modeling of Electronic Systems Assembly
ITC '01 Proceedings of the 2001 IEEE International Test Conference
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In recent years, multi-chip modules (MCMs) and other high density packages (HDPs) have become more and more important for high performance electronics. They offer interesting new possibilities to overcome the size, weight, and power constraints for communication, consumer, and automotive markets. With this technology, test and manufacturing aspects have to be considered already during the design process to ensure also an economically optimized product. Therefore, concurrent design of functionality, test, manufacturing, and economic aspects is a must in order to guarantee the "first time right" approach thus improving today's design cycles. In this paper, we present a process-oriented scalable cost modeling tool, the Modular Optimization Environment (MOE), with a graphical user interface (GUI) that companions the design and manufacturing process in order to allow a continuous cost/quality/performance trade-off analysis.