An MPEG-2 video encoder LSI with scalability for HDTV based on three-layer cooperative architecture
DATE '99 Proceedings of the conference on Design, automation and test in Europe
DATE '99 Proceedings of the conference on Design, automation and test in Europe
SuperENC: MPEG-2 Video Encoder Chip
IEEE Micro
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Hi-index | 0.00 |
We have developed a real-time MPEG2 (simple profile at main level) encoder chip set with ENC-M for motion compensation and ENC-C for coding/control. This set has full functions and sufficient processing power for real-time compression of NTSC 4:2:0 video signals (720 x 480 pels, 30 frames/s), with only three external memories: 4-Mbit VRAM, 16-Mbit synchronous DRAM, and 2-Mbit FIFO-structured DRAM. These features enable us to implement, for example, a small PC board for NTSC video CODEC.