Computer
Efficient (stack) algorithms for analysis of write-back and sector memories
ACM Transactions on Computer Systems (TOCS)
Evaluating Associativity in CPU Caches
IEEE Transactions on Computers
Efficient trace-driven simulation methods for cache performance analysis
ACM Transactions on Computer Systems (TOCS)
MIPS R4000 user's manual
Cache Performance in the VAX-11/780
ACM Transactions on Computer Systems (TOCS)
A Quantitative Evaluation of Cache Types for High-Performance Computer Systems
IEEE Transactions on Computers
Aspects of Cache Memory and Instruction
Aspects of Cache Memory and Instruction
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Stack simulation is a powerful cache analysis approach to generate the number of misses and write backs for various cache configurations in a single run. Unfortunately, none of the previous work on stack simulation has efficient stack algorithm for virtual address caches with real tags (V/R-type caches). In this paper, we devise an efficient stack simulation algorithm for analyzing V/R-type caches. Using markers with a valid range for synonym lines, our algorithm is able to keep track of stack distances for different cache configurations. In addition to cache miss ratios and write back ratios, our approach generates pseudonym frequency for all cache configurations under investigation.