Programming in Prolog (2nd ed.)
Programming in Prolog (2nd ed.)
A Machine-Oriented Logic Based on the Resolution Principle
Journal of the ACM (JACM)
Performance studies of a Prolog machine architecture
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Design of a high-speed Prolog machine (HPM)
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
A hardware unification unit: design and analysis
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Logic for Problem Solving
A Prolog Processor Based on a Pattern Matching Memory Device
Proceedings of the Third International Conference on Logic Programming
IEEE Transactions on Computers
A 16-Kbit Theta-Search Associative Memory
IEEE Micro
Design of a high speed logic engine for distributed decision support systems
Intelligent Decision Technologies
Hi-index | 14.99 |
A content addressable memory (CAM)-based machine architecture is proposed for a high-speed Prolog machine. This Prolog machine attempts to speed up the total Prolog execution performance by using a hierarchical pipelined scheme and a CAM-based backtracking scheme. The hierarchical pipelined scheme reduces the total number of Prolog execution steps to half of that using the conventional method. The CAM-based backtracking is efficiently and quickly achieved by using CAM's sophisticated garbage collection function, which eliminates the need for stacks and additional operation cycles. In this machine, all Prolog execution can be simply controlled by a semantic information 'inference depth' without any address handling by storing all working information, binding and control information, in CAMs. This machine attains a performance of 100 KLIPS (kilo logical inference per second) on the deterministic append program in the interpretive mode, and also attains high performance in the nondeterministic program.