Parallel prefix computation on extended multi-mesh network

Authors:
Prasanta K. Jana;B. Damodara Naidu;Shailendra Kumar;Monish Arora;Bhabani P. Sinha
Affiliations:
Department of Computer Science and Engineering, Indian School of Mines, Dhanbad 826 004, India;Department of Computer Science and Engineering, Indian School of Mines, Dhanbad 826 004, India;CReWMaN Lab, 411 Woolf Hall, 500 First Street, Arlington, TX;CReWMaN Lab, 411 Woolf Hall, 500 First Street, Arlington, TX;Advanced Computing and Microelectronics Unit, Indian Statistical Institute, 203 B.T. Road, Calcutta 700 035, India
Venue:
Information Processing Letters
Year:
2002

Citing 11
Cited 1

Depth-size trade-offs for parallel prefix computation

Journal of Algorithms
The design and analysis of parallel algorithms

The design and analysis of parallel algorithms
Faster optimal parallel prefix sums and list ranking

Information and Computation
Limited width parallel prefix circuits

The Journal of Supercomputing
Optimal schedules for parallel prefix computation with bounded resources

PPOPP '91 Proceedings of the third ACM SIGPLAN symposium on Principles and practice of parallel programming
Parallel computing using the prefix problem

Parallel computing using the prefix problem
An Efficient Sorting Algorithm on the Multi-Mesh Network

IEEE Transactions on Computers
A New Network Topology with Multiple Meshes

IEEE Transactions on Computers
Parallel Prefix Computation

Journal of the ACM (JACM)
New bounds for parallel prefix circuits

STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
Efficient Parallel Prefix Algorithms on Fully Connected Message-Passing Computers

HIPC '96 Proceedings of the Third International Conference on High-Performance Computing (HiPC '96)

Reconfigurable hardware solution to parallel prefix computation

The Journal of Supercomputing

Quantified Score

Hi-index	0.89

Visualization

Abstract

A parallel algorithm for prefix computation of N = n4 elements on an n × n extended multi-mesh network is presented. The network is a modified version of an earlier multi-mesh network with a 4-regular structure. The algorithm takes O(N1/4) time on N processors (13N1/4 - 5 communication steps and log N + 4 arithmetic/logic steps).