Clock tree synthesis for multi-chip modules
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
MCM interconnect design using two-pole approximation
Proceedings of the conference on Design, automation and test in Europe
Timing modeling and optimization under the transmission line model
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Modeling and analysis of crosstalk for distributed RLC interconnects using difference model approach
Proceedings of the 20th annual conference on Integrated circuits and systems design
Power characteristics of inductive interconnect
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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