Delay analysis of VLSI interconnections using the diffusion equation model
DAC '94 Proceedings of the 31st annual Design Automation Conference
Exact moment matching model of transmission lines and application to interconnect delay estimation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Optimal wire-sizing formula under the Elmore delay model
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Shaping a VLSI wire to minimize delay using transmission line model
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Theoretical limits for signal reflections due to inductance for on-chip interconnections
SLIP '00 Proceedings of the 2000 international workshop on System-level interconnect prediction
Effects of inductance on the propagation delay and repeater insertion in VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Closed form solutions to simultaneous buffer insertion/sizing and wire sizing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Optimal Design of Self-Damped Lossy Transmission Lines for Multichip Modules
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Timing modeling and optimization under the transmission line model
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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On-chip inductive effects are becoming predominant in deepsubmicron (DSM) interconnects due to increasing clock speeds, circuit complexity and decreasing interconnect lengths. Inductance causes noise in the signal waveforms, which can adversely affect the performance of the circuit and signal integrity. The traditional analysis of crosstalk in a transmission line begins with a lossless LC representation, yielding a wave equation governing the system response. This paper proposes a difference model approach to derive crosstalk in the transform domain. A closed form solution for crosstalk is obtained by incorporating initial conditions using difference model approach for distributed RLC interconnects. Simulation results show that the effect of inductive coupling forlong interconnects is significant but is almost negligible for local interconnects. It is also shown that when inductance is neglected, the proposed model reduces to a lumped RC model. Also, the analytical model response agrees very well that obtained with SPICE. All the experiments have been carried out for 90nm technology node using Cadence.s Dynamic Circuit Simulator SPECTRE©.