Signal degradation through module pins in VLSI packaging
IBM Journal of Research and Development
High-speed signal propagation on lossy transmission lines
IBM Journal of Research and Development
On-chip wiring for VLSI: status and directions
IBM Journal of Research and Development
Performance of Synchronous and Asynchronous Schemes for VLSI Systems
IEEE Transactions on Computers
Delay analysis of the distributed RC line
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Analysis of RC interconnections under ramp input
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Analysis of RC interconnections under ramp input
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Shaping a VLSI wire to minimize delay using transmission line model
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Modeling and analysis of crosstalk for distributed RLC interconnects using difference model approach
Proceedings of the 20th annual conference on Integrated circuits and systems design
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