Electrical design of signal lines for multilayer printed circuit boards
IBM Journal of Research and Development
Crosstalk and reflections in high-speed digital systems
AFIPS '65 (Fall, part I) Proceedings of the November 30--December 1, 1965, fall joint computer conference, part I
Simulating lossy interconnect with high frequency nonidealities in linear time
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Efficient transient simulation of lossy interconnect
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Delay analysis of VLSI interconnections using the diffusion equation model
DAC '94 Proceedings of the 31st annual Design Automation Conference
Performance limits of electrical cables for intrasystem communication
IBM Journal of Research and Development
VLSI on-chip interconnection performance simulations and measurements
IBM Journal of Research and Development
Modeling and characterization of long on-chip interconnections for high-performance microprocessors
IBM Journal of Research and Development
Figures of merit to characterize the importance of on-chip inductance
DAC '98 Proceedings of the 35th annual Design Automation Conference
Equivalent Elmore delay for RLC trees
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Theoretical limits for signal reflections due to inductance for on-chip interconnections
SLIP '00 Proceedings of the 2000 international workshop on System-level interconnect prediction
Variable-segment & variable-driver parallel regeneration techniques for RLC VLSI interconnects
Proceedings of the 12th ACM Great Lakes symposium on VLSI
Exploiting the on-chip inductance in high-speed clock distribution networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Quick On-Chip Self- and Mutual-Inductance Screen
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Self-timed interface for S/390 I/O subsystem interconnection
IBM Journal of Research and Development
Electrical characterization and performance limits of a flexible cable
IBM Journal of Research and Development
A design space exploration of transmission-line links for on-chip interconnect
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
A novel theory on parallel repeater-insertion methodologies for long on-chip interconnects
International Journal of Circuit Theory and Applications
| Hi-index | 0.00 |