High-speed signal propagation on lossy transmission lines
IBM Journal of Research and Development
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Effects of inductance on the propagation delay and repeater insertion in VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Repeaters are now widely used to enhance the performance of long On-Chip interconnects in CMOS VLSI. For RC-modeled in驴terconnects, parallel repeaters have proved to be superior to serial ones. In this paper, a Variable-Segment Regeneration Technique is introduced and compared with a Variable-driver Parallel Tech驴nique, a recently proposed transparent repeater and with three con驴ventional techniques. HSpice Simulations using a 0.25 &mgr;m TSMC technology show that both the variable-segment and variable-driver techniques feature 62% time delay saving and 354% Area-Delay product saving over the transparent repeater, and are superior to all conventional techniques. However, our new variable-segment technique is characterized by a 116% Area-Delay product saving over the variable-driver technique. Thus, making it the most perfor驴mant in the field of high-performance RLC interconnect regenera驴tion. The simulation results confirm the superiority of the parallel regeneration technique over the serial ones.