Delay analysis of VLSI interconnections using the diffusion equation model
DAC '94 Proceedings of the 31st annual Design Automation Conference
Delay analysis of the distributed RC line
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Optimal wire-sizing formula under the Elmore delay model
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Analytical delay models for VLSI interconnects under ramp input
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Optimal wire-sizing function with fringing capacitance consideration
DAC '97 Proceedings of the 34th annual Design Automation Conference
Interconnect design for deep submicron ICs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Optimal shape function for a bi-directional wire under Elmore delay model
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Shaping a VLSI Wire to Minimize Elmore Delay
EDTC '97 Proceedings of the 1997 European conference on Design and Test
The Elmore delay as a bound for RC trees with generalized input signals
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wire-sizing for delay minimization and ringing control using transmission line model
DATE '00 Proceedings of the conference on Design, automation and test in Europe
An efficient analytical model of coupled on-chip RLC interconnects
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
A fast and accurate delay estimation method for buffered interconnects
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Timing modeling and optimization under the transmission line model
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Wire sizing with scattering effect for nanoscale interconnection
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Wire shaping of RLC interconnects
Integration, the VLSI Journal
Modeling and analysis of crosstalk for distributed RLC interconnects using difference model approach
Proceedings of the 20th annual conference on Integrated circuits and systems design
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