Array-Based Analog Computation
IEEE Micro
ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
A Mixed-Mode Analog Neural Network Using Current-Steering Synapses
Analog Integrated Circuits and Signal Processing
Intrinsic and extrinsic implementation of a bio-inspired hardware system
Information Sciences—Informatics and Computer Science: An International Journal - Special issue: Bio-inspired systems (BIS)
A neural simulation system based on biologically realistic electronic neurons
Information Sciences—Informatics and Computer Science: An International Journal - Special issue: Bio-inspired systems (BIS)
Investigating the Suitability of FPAAs for Evolved Hardware Spiking Neural Networks
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
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The usefulness of an artificial analog neural network is closely bound to its trainability. This paper introduces a new analog neural network architecture using weights determined by a genetic algorithm. The first VLSI implementation presented in this paper achieves 200 giga connections per second with 4096synapses on less than 1 mm2 silicon area. Since the training can be done at the full speed of the network, several hundred individuals per second can be tested by the genetic algorithm. This makes it feasible to tackle problems that require large multi-layered networks.