Fast RSA-hardware: dream or reality

Authors:
F. Hoornaert;M. Decroos;J. Vandewalle;R. Govaerts
Affiliations:
CRYPTECH NV/SA, Brussels, Belgium;CRYPTECH NV/SA, Brussles, Belgium;ESAT K.U.LEUVEN, Belgium;ESAT K.U.LEUVEN, Belgium
Venue:
Lecture Notes in Computer Science on Advances in Cryptology-EUROCRYPT'88
Year:
1988

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Abstract

This paper describes a successful hardware implementation of the RSA algorithm. It is implemented as an 120-bit bit-slice processor, which may be interconnected without additional circuitry to obtain arbitrary word lengths. With 512-bit operands, exponentiation takes less than 30 milliseconds.