Using MTBDDs for Compostion and Model Checking of Real-Time Systems
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Symbolic model checking for a discrete clocked temporal logic with intervals
Proceedings of the IFIP WG 10.5 International Conference on Correct Hardware Design and Verification Methods: Advances in Hardware Design and Verification
Modleing and Checking Networks of Communicating Real-Time Process
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Verifying BDD Algorithms through Monadic Interpretation
VMCAI '02 Revised Papers from the Third International Workshop on Verification, Model Checking, and Abstract Interpretation
Symbolic Verification and Analysis of Discrete Timed Systems
Formal Methods in System Design
An abstract reachability approach by combining HOL induction and multiway decision graphs
Journal of Computer Science and Technology
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In this paper we describe the formal specification and veri fication of the efficient algorithm for real-time model checking implemented in the model checker RAVEN. It was specified and proved using the KIV system. We demonstrate how to decompose the correctness proof into several independent subtasks and indicate the corresponding verification efforts. The formal verification revealed some errors, reduced the code size, and improved the efficiency of the implementation.