Application of high level interface-based design to telecommunications system hardware
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Hardware reuse at the behavioral level
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Computer-Aided Reasoning: An Approach
Computer-Aided Reasoning: An Approach
Verifying the FM9801 Microarchitecture
IEEE Micro
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
The formal verification of generic interpreters
The formal verification of generic interpreters
Formal verification of an advanced pipelined machine
Formal verification of an advanced pipelined machine
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We describe how to specify an executable behavioral model of hardware without specifying the hardware detail using ACL2 encapsulation. ACL2 encapsulation is a mechanism to introduce abstract functions with constraints. It can be used to specify a microarchitectural design of hardware, which can be used for early simulation and for verification. Such a high-level design can also be used as a reference model when implementing low-level designs in RTL. This paper examines two abstract specifications from a microprocessor verification project. One example is a branch predictor for a processor with speculative execution and the other is a pipelined multiplier.