High-speed switch scheduling for local-area networks
ACM Transactions on Computer Systems (TOCS)
Two-dimensional round-robin schedulers for packet switches with multiple input queues
IEEE/ACM Transactions on Networking (TON)
Scheduling algorithms for input-queued cell switches
Scheduling algorithms for input-queued cell switches
The iSLIP scheduling algorithm for input-queued switches
IEEE/ACM Transactions on Networking (TON)
Symmetric Crossbar Arbiters for VLSI Communication Switches
IEEE Transactions on Parallel and Distributed Systems
Scheduling nonuniform traffic in high speed packet switches and routers
Scheduling nonuniform traffic in high speed packet switches and routers
Achieving 100% throughput in an input-queued switch
INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 1
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A packet-aware non-interleaving scheduling algorithm is proposed and examined in this paper. The non-interleaving scheduling algorithm eliminates the complexity of packet reassembly at the output queue. The characteristics of packet latency and queue occupancies are investigated in comparison with the cell-interleaving scheduling algorithm. The simulated results show that the packet-aware non-interleaving scheduling could be a feasible or better choice for packet switch implementations in the latency, output buffer requirement and implementation complexity viewpoints. The simulated results are obtained using self-similar traffic generated based on the measured Internet backbone traffic that reflects the predominance of short packets.