Model checking and modular verification
ACM Transactions on Programming Languages and Systems (TOPLAS)
Proof-checking a data link protocol
TYPES '93 Proceedings of the international workshop on Types for proofs and programs
Unreliable channels are easier to verify than perfect channels
Information and Computation
Protocol Description and Analysis Based on a State Transition Model with Channel Expressions
Proceedings of the IFIP WG6.1 Seventh International Conference on Protocol Specification, Testing and Verification VII
A Bounded Retransmission Protocol for Large Data Packets
AMAST '96 Proceedings of the 5th International Conference on Algebraic Methodology and Software Technology
ICALP '97 Proceedings of the 24th International Colloquium on Automata, Languages and Programming
The Bounded Retransmission Protocol Must Be on Time!
TACAS '97 Proceedings of the Third International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Experiments in Theorem Proving and Model Checking for Protocol Verification
FME '96 Proceedings of the Third International Symposium of Formal Methods Europe on Industrial Benefit and Advances in Formal Methods
Construction of Abstract State Graphs with PVS
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
On-the-Fly Analysis of Systems with Unbounded, Lossy FIFO Channels
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Computing Abstractions of Infinite State Systems Compositionally and Automatically
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Property Preserving Simulations
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
CADP - A Protocol Validation and Verification Toolbox
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Symbolic Verification with Periodic Sets
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Parallel program schemata: A mathematical model for parallel computation
FOCS '67 Proceedings of the 8th Annual Symposium on Switching and Automata Theory (SWAT 1967)
On Verifying Fair Lossy Channel Systems
MFCS '02 Proceedings of the 27th International Symposium on Mathematical Foundations of Computer Science
Bisimulation and Other Undecidable Equivalences for Lossy Channel Systems
TACS '01 Proceedings of the 4th International Symposium on Theoretical Aspects of Computer Software
Well-Abstracted Transition Systems
CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
Channel Representations in Protocol Verification
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
How to Compose Presburger-Accelerations: Applications to Broadcast Protocols
FST TCS '02 Proceedings of the 22nd Conference Kanpur on Foundations of Software Technology and Theoretical Computer Science
Analyzing Fair Parametric Extended Automata
SAS '01 Proceedings of the 8th International Symposium on Static Analysis
Verification of Infinite-State Systems by Combining Abstraction and Reachability Analysis
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
The linear temporal logic of rewriting Maude model checker
WRLA'10 Proceedings of the 8th international conference on Rewriting logic and its applications
Reachability Problems in Piecewise FIFO Systems
ACM Transactions on Computational Logic (TOCL)
A complete abstract interpretation framework for coverability properties of WSTS
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Piecewise FIFO channels are analyzable
VMCAI'06 Proceedings of the 7th international conference on Verification, Model Checking, and Abstract Interpretation
Expand, enlarge and check... made efficient
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
Verification of communication protocols using abstract interpretation of FIFO queues
AMAST'06 Proceedings of the 11th international conference on Algebraic Methodology and Software Technology
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We consider the problem of verifying automatically infinitestate systems that are systems of finite machines that communicate by exchanging messages through unbounded lossy fifo channels. In a previous work [1], we proposed an algorithmic approach based on constructing a symbolic representation of the set of reachable configurations of a system by means of a class of regular expressions (SREs). The construction of such a representation consists of an iterative computation with an acceleration technique which enhances the chance of convergence. This technique is based on the analysis of the effect of iterating control loops. In the work we present here, we experiment our approach and show how it can be effectively applied. For that, we developed a tool prototype based on the results in [1]. Using this tool, we provide an automatic verification of (the parameterized version of) the Bounded Retransmission Protocol.