On the Effectiveness of Theorem Proving Guided Discovery of Formal Assertions for a Register Allocator in a High-Level Synthesis System

Authors:
Naren Narasimhan;Ranga Vemuri
Affiliations:
-;-
Venue:
Proceedings of the 11th International Conference on Theorem Proving in Higher Order Logics
Year:
1998

Citing 0
Cited 3

Accounting for various register allocation schemes during post-synthesis verification of RTL designs

DATE '99 Proceedings of the conference on Design, automation and test in Europe
Automated Correctness Condition Generation for Formal Verification ofSynthesized RTL Designs

Formal Methods in System Design - Special issue on formal methods for computer-added design
Theorem Proving Guided Development of Formal Assertions in a Resource-Constrained Scheduler for High-Level Synthesis

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Abstract