Hardware Cache Optimization for Parallel Multimedia Applications

How to solve the current memory access and data transfer bottlenecks: at the processor architecture or at the compiler level

DATE '00 Proceedings of the conference on Design, automation and test in Europe

Systematic speed-power memory data-layout exploration for cache controlled embedded multimedia applications

Proceedings of the 14th international symposium on Systems synthesis

Interaction Between Data Parallel Compilation and Data Transfer and Storage Cost Minimization for Multimedia Applications

Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing

A systematic methodology for the application of data transfer and storage optimizing code transformations for power consumption and execution time reduction in realizations of multimedia algorithms on programmable processors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Combined Application of Data Transfer and Storage Optimizing Transformations and Subword Parallelism Exploitation for Power Consumption and Execution Time Reduction in VLIW Multimedia Processors

Journal of VLSI Signal Processing Systems

Cache modeling and optimization for portable devices running MPEG-4 video decoder

Multimedia Tools and Applications