Impact of the Head-of-Line Blocking on Parallel Computer Networks: Hardware to Applications

Authors:
Valentin Puente;José A. Gregorio;Cruz Izu;Ramón Beivide
Affiliations:
-;-;-;-
Venue:
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Year:
1999

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Abstract

A fully adaptive router with hybrid buffers at the input and output channels was designed, which improves the throughput of its input buffer counterpart by up to 40% and has only 10% higher base latency. An in-depth analysis of different router buffer organization was carried out for a toroidal network, which uses either a deterministic (DOR) or a fully adaptive routing scheme. Each proposal is described in VHDL and evaluated with the Synopsys synthesis tool. Technological restrictions obtained were used to evaluate network performance under both synthetic loads and real applications.